FPGA Engineer

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FPGA Engineer

Responsibilities:

Develop and test network applications utilized in trading and risk management

Design and rapidly implement prototypes of the above using knowledge of the most appropriate computational algorithms and data structures

Write thorough testbenches for all internally developed components

Analyze performance in detail and continuously identify bottlenecks

Interface with users to ensure that requirements are met

Requirements:

At least 3 years of professional experience developing with a commercially used HDL (preferably System Verilog and/or Verilog)

Experience with FPGA development using Xilinx Vivado design software preferred

Must have Verilog experience

Completed at least one full FPGA design cycle

Looking for development experience in Verilog targeting the Xilinx state of the art FPGA's

Experience using VCS, ModelSim, Questa Core or an equivalent simulation tool

Candidate must have development and design experience rather than FPGA testers or verification

Experience with timing closure techniques for large designs

Coding experience with C/C++ and/or scripting languages such as python

Knowledge of network operations and protocols

Desired:

In-depth knowledge of TCP/IP protocol stack

Experience writing test benches

Proficiency utilizing DMA and operating with related kernel modules in Linux (using C/C++)

Knowledge of PCIe Bus Standard preferred

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